In their third installment of a groundbreaking research series1, Franklin Equity Portfolio Manager Matthew J. Moberg, CPA, and Research Analyst Emily Elott present a rigorous and ambitious argument: the S-curve governing AI compute is not one curve but many, stacking and compounding simultaneously, with each bottleneck resolved opening the next frontier. The report, published in September 2026, identifies five structural frontiers driving AI system performance beyond what Moore's Law alone could ever produce.
The Unit of Compute Has Shifted
The central reorientation in the paper is definitional. The unit of meaningful AI compute is no longer the chip. It is the system, and eventually the factory. Moberg and Elott frame it plainly: "If the Moore's Law Era was about selling a horse, then this new era is about selling the horse, stable, trainer and track." The GPU remains the engine, but its value is constrained by everything surrounding it. Today, most GPUs process tokens only 30 to 50 percent of the time, with the remainder spent waiting for data. One industry analysis cited in the paper estimates that 47 percent of total system energy goes to moving data between components, versus only eight percent for the GPU calculations themselves. The engine is already powerful. The bottleneck is the system.
Five Frontiers, Five S-Curves
Moberg and Elott identify five improvable constraints: memory, packaging, networking, power, and tensor compute. Each is moving along its own improvement trajectory, and progress in one multiplies the value of advances in the others.
On memory, High Bandwidth Memory has delivered roughly a tenfold increase in bandwidth over the past decade by stacking DRAM dies vertically and placing them millimeters from the GPU rather than centimeters away. The analogy the authors use is instructive: it is "like replacing several spread-out ranch homes with an eight-story apartment building connected by lightning-fast elevators." The next generation, HBM4, promises more than two terabytes per second of bandwidth per stack, continuing an improvement cadence now comparable to Moore's Law itself.
Packaging is what made HBM practical. TSMC's CoWoS technology brought memory and compute physically together on a silicon interposer, collapsing data travel distances from centimeters to millimeters. The next advance, hybrid bonding, will shrink that further still, to micrometers, replacing metal solder bumps with direct copper-to-copper connections. "Packaging has," the authors note, "evolved from a manufacturing afterthought into one of the most strategically important technologies in semiconductors."
Networking has doubled in bandwidth roughly every two to three years historically. AI demand has now compressed that to a doubling every two years. The optical transition is well underway, moving fiber progressively inward from long-haul links into rack-scale systems, with co-packaged optics the next major milestone. The vision is explicit: future advances "may allow geographically distributed GPU clusters to behave more like a single computing system."
Power is the wildcard. AI factories are approaching gigawatt-scale electricity demand, contributing to US power consumption now 18 percent above 2020 levels after nearly two decades of stagnation. The emerging 800VDC architecture reduces power-conversion losses across the data center journey, with full commercial deployment expected by 2029. Applied at scale, the efficiency gain would be enough to power approximately two million US homes.
Tensor compute rounds out the picture. Since tensor cores were introduced in 2017, raw AI compute performance has improved at roughly 50 percent per year. More efficient number formats, from FP16 to FP4, combined with denser transistor designs and faster clock speeds, continue to expand theoretical performance. Since 2012, tokens per watt has improved by approximately one million times.
The Recursive Element
The conclusion the authors draw is not merely additive. "These gains are multiplicative rather than additive," Moberg and Elott write, describing memory, networking, and packaging as "multiple S-curves stacking on top of each other." More compute enables better AI. Better AI may help solve the memory wall, optimize packaging design, or accelerate clean energy generation. The recursive loop is part of the thesis.
5 Key Takeaways for Advisors and Investors
- The semiconductor trade is a systems trade. Investors focused narrowly on chip design may be missing the larger opportunity across memory, packaging, networking, and power infrastructure.
- GPU utilization is the signal to watch. Current utilization of 30 to 50 percent could rise to 85 percent as bottlenecks are addressed, dramatically improving returns on existing hardware investment.
- Power infrastructure is a growth category. Utility-scale AI electricity demand is creating real investment opportunities in power delivery, cooling, and clean energy generation.
- The roadmap is visible. Unlike many technology cycles, the path forward in AI compute is largely identifiable. This reduces execution risk for companies with the capital and expertise to pursue it.
- Mean-reversion is the wrong lens. As Moberg and Elott argue directly, innovation investing works best during periods of significant disruption. By their assessment, that period is now.
Matthew J. Moberg, CPA, is Portfolio Manager, Franklin Equity. Emily Elott is Research Analyst, Franklin Equity. September 2026.
Footnote:
1 Moberg, Matthew J., and Emily Elott. "The Limit Does Not Exist: Rethinking the S-Curve in the Age of Compounding Innovation, Part III." Franklin Templeton, September 2026, https://franklintempletonprod.widen.net/s/xk9ztgkwqd/the-limit-does-not-exist-s-curves-part-3.pdf.
